|
Research Highlights Error Correction Laboratory: Director. Coding theory and applications to quantum computing and communications, optical communications and flash memories.LDPC Codes: Pioneering work on structured low-density parity check (LDPC) error correcting codes and iterative decoders. Designed codes and decoders with best error-floor performance known today. Codelucida: Founder and Chief Scientific Officer of Codelucida, a company developing error correction coding solutions for flash memories. Bell Labs: An inventor of the soft error-event decoding algorithm, and the key architect of a detector/decoder for Bell Labs data storage read channel chips which were regarded as the best in industry. |
|
Honors and Distictions IEEE Fellow - For contributions to coding theory and its application in data storage systems and optical communications Fulbright Scholar Kenneth Von Behren Chair da Vinci Fellow Chair of the Data Storage Technical Group - IEEE Communications SocietySerbian Academy of Sciences and Arts Scholarship 2019 Best of Show Award for the Most Innovative Flash Memory Technology for Codelucida - Flash Memory Summit 2018 I-Squared Startup of the Year for Codelucida - Tech Launch Arizona Institute of Advanced Study Grant - Universite Paris Seine 2017 Arizona Innovation Challenge Award for Codelucida - Arizona Commerce Authority Expert Panel Chair - Flash Memory Summit |
Error Correction Laboratory |
Members and Collaborators |
Research |
Research papers |
|
N. Raveendran, D. Declercq, and B. Vasić, "A Sub-Graph Expansion-Contraction Method for Error Floor Computation," IEEE Transactions on Communications, 2020. We developed a computationally efficient method for estimating error floors of low-density parity-check (LDPC) codes over the binary symmetric channel (BSC) without any prior knowledge of its trapping sets. In some cases our method provides a million-fold improvement in computational complexity over standard Monte-Carlo simulation. |
Teaching |
Courses 2020/2021 |
|
Course Curse silabus |